Routing Congestion in VLSI Circuits: Estimation and Optimization
Saxena, Prashant.
Routing Congestion in VLSI Circuits: Estimation and Optimization [electronic resource] / by Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar. - Boston, MA : Springer Science+Business Media, LLC, 2007. - v.: digital - Series on Integrated Circuits and Systems, 1558-9412 .
9780387485508
Engineering
Computer aided design
Telecommunication
Systems engineering
Engineering
Circuits and Systems
Computer-Aided Engineering (CAD, CAE) and Design
Communications Engineering, Networks
TK7874.75 / S29 2007
Routing Congestion in VLSI Circuits: Estimation and Optimization [electronic resource] / by Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar. - Boston, MA : Springer Science+Business Media, LLC, 2007. - v.: digital - Series on Integrated Circuits and Systems, 1558-9412 .
9780387485508
Engineering
Computer aided design
Telecommunication
Systems engineering
Engineering
Circuits and Systems
Computer-Aided Engineering (CAD, CAE) and Design
Communications Engineering, Networks
TK7874.75 / S29 2007