Direct Transistor-level Layout for Digital Blocks [electronic resource] / by Prakash Gopalakrishnan, Rob A. Rutenbar.
Material type:![Computer file](/opac-tmpl/lib/famfamfam/CF.png)
- 9781402080630
- TK7874.55 G67 2005
Item type | Current library | Call number | Vol info | URL | Copy number | Status | Notes | Date due | Barcode | |
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Biblioteca Digital Colección Digital | TK7874.55 G67 2005 (Browse shelf(Opens below)) | BDIG00004893 | Link to resource | 1 | Available | SpringerLink | BDIG00004893 |
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TK7874 Z33 2008 Magnetic Heterostructures Advances and Perspectives in Spinstructures and Spintransport / | TK7874.53 N87 2005 Interconnect-Centric Design for Advanced SoC and NoC | TK7874.55 C37 2006 Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits | TK7874.55 G67 2005 Direct Transistor-level Layout for Digital Blocks | TK7874.55 L56 2005 Mixed-Signal Layout Generation Concepts | TK7874.55 N36 2007 Modern Circuit Placement | TK7874.58 B68 2008 Generating Hardware Assertion Checkers |
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