TY  - DATA
AU  - Saxena,Prashant
AU  - Shelar,Rupesh S.
AU  - Sapatnekar,Sachin S.
ED  - SpringerLink (Online service)
TI  - Routing Congestion in VLSI Circuits: Estimation and Optimization
T2  - Series on Integrated Circuits and Systems,
SN  - 9780387485508
AV  - TK7874.75 S29 2007
PY  - 2007///
CY  - Boston, MA
PB  - Springer Science+Business Media, LLC
KW  - Engineering
KW  - Computer aided design
KW  - Telecommunication
KW  - Systems engineering
KW  - Circuits and Systems
KW  - Computer-Aided Engineering (CAD, CAE) and Design
KW  - Communications Engineering, Networks
UR  - http://dx.doi.org/10.1007/0-387-48550-3
ER  -