CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies [electronic resource] : Process-Aware SRAM Design and Test / by Andrei Pavlov, Manoj Sachdev.
Material type:![Computer file](/opac-tmpl/lib/famfamfam/CF.png)
- 9781402083631
- TK7871.99.M44 P38 2008
Item type | Current library | Call number | URL | Copy number | Status | Notes | Date due | Barcode | |
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Biblioteca Digital Colección Digital | TK7871.99.M44 (Browse shelf(Opens below)) | Link to resource | 1 | Available | SpringerLink | BDIG00005007 |
Browsing Biblioteca Digital shelves, Shelving location: Colección Digital Close shelf browser (Hides shelf browser)
TK7871.85 S46 2008 ESD Protection Device and Circuit Design for Advanced CMOS Technologies | TK7871.9 C65 2008 FinFETs and Other Multi-Gate Transistors | TK7871.95 G73 1006 TRANSISTOR LEVEL MODELING FOR ANALOG/RF IC DESIGN | TK7871.99.M44 CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies | TK7871.99.M44 H33 2007 Low-Frequency Noise In Advanced Mos Devices | TK7871.99.M44 L35 2008 Design and Modeling of Millimeter-Wave CMOS Circuits for Wireless Transceivers | TK7871.99.M44 R56 2006 CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom |
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